1. Field of the Invention
The present invention relates to a signal generating device and a frequency synthesizer.
2. Description of the Related Art
As one of standard signal generators, there is a known frequency synthesizer using a PLL (Phase Locked Loop) which is applied to, for example, a local oscillating part in a mobile station, a test signal source of a radio communication device, a broadcasting device, and the like. When the frequency synthesizer is applied in, for example, a communication field, its noise has to be small in order to avoid interference with other channels, and it is desirably capable of setting the frequency as finely as possible in the state that radio waves are congested.
Hence this applicant has developed a frequency synthesizer with a simple circuit configuration satisfying the above needs, and its technique has already been disclosed in Patent Document 1 and the like. For example, in the method in Patent Document 1, the output signal of a voltage controlled oscillator is A/D (analog/digital) converted, the digital signal is processed and D/A converted, and the obtained analog signal is inputted into the voltage controlled oscillator as a control voltage.
However, such a device performs A/D (analog/digital) conversion and then processes and D/A converts the digital signal, and thus has a limit in improving the spurious characteristics. In addition, there is a problem that its circuit is not sufficiently simplified because of both A/D conversion and D/A conversion.
Patent Document 2 discloses a method of generating a triangular wave of a frequency according to digital data and obtaining a zero cross timing of an analog triangular wave using a comparator to obtain a pulse signal of the frequency corresponding to the frequency of the triangular wave. In this technique, after D/A conversion of the digital data, the analog triangular wave is linearly interpolated. The purpose of linear interpolation is to fix the zero cross timing to a timing according to the frequency because the timing of the analog triangular wave crossing a zero point cannot be made more accurate than a sample timing of the digital signal (paragraphs 0019 to 0023). However, when a reference signal is generated using the signal generator to form a PLL, the zero cross of the triangular wave cannot be accurately detected, and therefore the technique is not enough to decrease the phase noise.
To wrap up the above, it is requested to produce a frequency synthesizer with a simple circuit configuration, and when constituting a frequency synthesizer responding to the request, it is also requested to generate an excellent signal with low noise for a standard signal used for a reference signal, for example, a clock signal with a simple circuit configuration.    Patent Document 1: Japanese Patent Application Laid-open No. 2007-74291    Patent Document 2: Japanese Patent Application Laid-open No. Hei 5-206732